1. Field of the Invention
The present invention relates generally to signal processing, and more particularly to reducing the occurrence of alias frequencies in the processing of signals.
2. The Prior Art
It is often necessary to convert an analog signal comprising various frequencies into a digital signal. This conversion can be accomplished by periodically sampling the analog signal and expressing the instantaneous value of the analog signal in digital form. However, if the signal being sampled contains a frequency which is greater than one-half the sampling frequency, aliasing can occur. "Aliasing" refers to the conversion of high frequency components of the original signal into low frequency components as a side effect of the sampling process.
More particularly, if the signal to be sampled contains a frequency S that is higher than one-half the clock sampling frequency C, then the sampling process will yield "aliases" of S at a plurality of lower frequencies F.sub.n according to the relation EQU F.sub.n =S-n*C
where n is any integer. To prevent such "alias" frequencies from appearing in the samples, the signal being sampled must first be carefully filtered to remove any frequencies higher than C/2. Unfortunately, such filtering often is difficult to accomplish or results in other unwanted side effects, and hence there is a need for a way to prevent aliasing from taking place during sampling of an unfiltered signal.
Aliasing also poses a problem in the synthesis of a signal having a desired frequency. A synthesizer generates a signal having a desired frequency by a periodic incrementing process, and as a result of this process high-order harmonics of the output frequency are aliased down to lower frequencies and injected into the synthesized signal. In particular, a synthesizer that employs a clock having a frequency C and that provides an output signal having a frequency S will alias an mth harmonic of S down to a plurality of lower frequencies F.sub.n according to the equation EQU F.sub.n =m*S-n*C
where m and n are any integers, and these unwanted frequencies F.sub.n are found in the output signal along with the desired frequency S.
In an article titled "Alias-Free Sampling of Random Noise" (J. Soc. Indust. App. Math., June 1960, vol. 8, page 225), Shapiro and Silverman demonstrated that aliasing can be entirely prevented by sampling at unequal intervals of time if the intervals are determined according to specified processes. In particular, aliasing does not take place if the time T.sub.n of taking the nth sample is computed according to the equation EQU T.sub.n =T.sub.n-1 +x.sub.n
where T.sub.n-1 is the time of the preceding sample and x.sub.n is a random number determined according to a Poisson process.
A number of other researchers have developed the Shapiro and Silverman approach further, but all of these developments require the use of a Poisson process. It is not feasible to achieve a perfect Poisson process in practice, and although an approximation to such a process can be realized, even in such an approximation some of the random numbers x.sub.n can get so large, compared to the average sampling interval, as to be unwieldy. Accordingly, the Shapiro and Silverman approach has not solved the problem.
A somewhat different approach, applicable specifically to digital synthesizers, is demonstrated in U.S. Pat. No. 4,410,954 (Wheatley). In the Wheatley apparatus, a random variable is combined with a digital frequency-selection word to jitter the word about a pre-selected value. Although this technique reduces aliasing, it increases phase noise, and the end result is a signal having a power spectrum not much better than the power spectrum of a signal produced by a conventional synthesizer and containing alias frequencies.
Accordingly, there is still a need for a practical way to reduce the incidence of alias frequencies during the processing of signals.